Compiler-Microarchitecture Lab: Publications
Department of Computer Science
School of Computing and Informatics
Arizona State University
PBExplore
Varying partial bypassing in pipelined processors is an effective way
to make performance, area and energy tradeoffs in embedded
processors.
However, performance evaluation of partial bypassing in processors has
been inaccurate, largely due to the absence of bypass-sensitive
retargetable compilation techniques.
Furthermore no existing partial bypass exploration framework estimates
the power and cost overhead of partial bypassing.
This tool, PBExplore provides an automated framework for
Compiler-in-the-Loop exploration of partial bypassing in processors.
PBExplore accurately evaluates the performance of a partially bypassed
processor using a generic bypass-sensitive compilation technique, and
thus effectively performs multi-dimensional exploration of the partial
bypass design space.
More details about PBExplore are in this paper.
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