Compiler-Microarchitecture Lab: Publications
Department of Computer Science
School of Computing and Informatics
Arizona State University
PTSMT
Simultaneous Multi-Threading (SMT) processors are becoming popular
because they exploit both instruction-level and thread-level
parallelism by issuing instructions from different threads in the same
cycle. However, the issues of power and thermal management hinder
SMT processors fabricated in nano-scale technologies. Power and
thermal issues in SMT processors not only limit the achievable
performance, but also have a direct impact on the cost and viability
of these processors. While several performance simulation tools to
explore the performance aspect of SMT processors early in their design
phase exist, there is a lack of early power and performance evaluation
tools for SMT processors. PTSMT is a tightly coupled power, performance and thermal exploration tool for
SMT processors. PTSMT can automatically and effectively accomplish power, performance and thermal
exploration of SMT processors at various levels of design hierarchy,
at the application level, microarchitecture level, and physical
level.
More details about PTSMT are in this paper.
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