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Stack Data Management for Limited Local Memory (LLM) Multi-core
Processors
NEW Ke Bai, Aviral Shrivastava, and Saleel Kudchadker ASAP 2011 :Proceedings of the International Conference on Application Specific Systems, Architectures and Processors |
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Enabling Multithreading on CGRAs
NEW Aviral Shrivastava, Jared Pager, Reiley Jeyapaul, Mahdi Hamzeh, and Sarma Vrudhula ICPP 2011 :Proceedings of the International Conference on Parallel Processing |
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Unsync: A Soft-Error Resilient Redundant Multicore Architecture
NEW Reiley Jeyapaul, Fei Hong, Aviral Shrivastava, Abhishek Risheekesan, and Kyoungwoo Lee ICPP 2011 :Proceedings of the International Conference on Parallel Processing |
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Fast and Energy-Efficient Constant-Coefficient FIR Filters
Using Residue Number System
NEW Piotr Patronik, Krzysztof Berezowski, Stanislaw Piestrak, Janusz Biernat and Aviral Shrivastava ISLPED 2011 :Proceedings of the International Symposium on Low Power Electronics and Design |
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CuMAPz: A tool to Analyze Memory Access Patterns in CUDA
NEW Yooseong Kim, Aviral Shrivastava DAC 2011 :Proceedings of the 48th Design Automation Conference |
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LA-LRU: A Latency-Aware Replacement Policy for Variation
Tolerant Caches
NEW Aarul Jain, Aviral Shrivastava, and Chaitali Chakrabarti VLSI 2011 :Proceedings of the 24th International Conference on VLSI Design |
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Heap Data Management for Limited Local Memory (LLM) Multi-core Processors Ke Bai and Aviral Shrivastava CODES+ISSS 2010 :Proceedings of the 8th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis |
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Dynamic Code Mapping for Limited Local Memory Systems Seung chul Jung, Aviral Shrivastava, and Ke Bai ASAP 2010 :Proceedings of the 2010 International Conference on Application-specific Systems, Architectures and Processors |
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B2P2: Bounds Based Procedure Placement for Instruction TLB Power Reduction in Embedded Systems Reiley Jeyapaul and Aviral Shrivastava SCOPES 2010 :Proceedings of the 2010 International Workshop on Software and Compilers for Embedded Systems |
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Cache Vulnerability Equations for Protecting Data in Processor Caches from Soft Errors Aviral Shrivastava, Jongeun Lee, and Reiley Jeyapaul LCTES 2010 :Proceedings of the 2010 International Conference on Languages Compilers and Tools for Embedded Systems |
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Operation and Data Mapping for CGRAs
with Multi-bank Memory Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee Yoon, and Yunheung Paek LCTES 2010 :Proceedings of the 2010 International Conference on Languages Compilers and Tools for Embedded Systems |
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Power-Accuracy Tradeoffs in Human Activity Detection Jeffrey Boyd, Hari Sundaram, and Aviral Shrivastava DATE 2010 :Proceedings of the 2010 International Conference on Design Automation and Test in Europe |
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Memory-Aware Application Mapping on Coarse Grain Reconfigurable Arrays Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee Yoon, and Yunheung Paek HIPEAC 2010 :Proceedings of the 2010 International Conference on High-Performance Embedded Architectures and Compilers |
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Exploiting Residue Number System for
Power-Efficient Digital Signal Processing in Embedded Processors Rooju Chokshi, Krzysztof Berezowski, and Aviral Shrivastava CASES 2009 :Proceedings of the 2009 International Conference on Compilers, Architectures and Synthesis for Embedded Systems |
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A Compiler Optimization to Reduce Soft Errors in Register Files
Jongeun Lee and Aviral Shrivastava LCTES 2009 :Proceedings of the 2009 ACM SIGPLAN/SIGBED Conference on Language, Compilers and Tool support for Embedded Systems |
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Adaptive Recuced Bit-width Instruction Set Architecture (adapt-RISA)
Sandro Neves Soares, Ashok Halambi, Aviral Shrivastava, Flavio Rech Wagner, and Nikil Dutt VLSI-SOC 2009 :Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integreation |
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FSAF: File System Aware Flash Translation Layer for NAND Flash Memories
Sai Mylavarapu, Siddharth Chaudhuri, Aviral Shrivastava, Jongeun Lee, and Tony Givargis DATE 2009 :Proceedings of the International Conference on Design Automation and Test in Europe |
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Static Analysis to Mitigate Soft Errors in Register Files
Jongeun Lee and Aviral Shrivastava DATE 2009 :Proceedings of the International Conference on Design Automation and Test in Europe |
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A Software Solution for Dynamic Stack Management on Scratch Pad Memory
Arun Kannan, Aviral Shrivastava, Amit Pabalkar and Jongeun Lee ASPDAC 2009 :Proceedings of the Asia and South Pacific Design Automation Conference |
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Compiler-Managed Register File Protection for Energy-Efficient Soft Error Reduction
Jongeun Lee and Aviral Shrivastava ASPDAC 2009 :Proceedings of the Asia and South Pacific Design Automation Conference |
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Code Transformations for TLB Power Reduction
Reiley Jeyapaul, Sandeep Marathe, and Aviral Shrivastava VLSI 2009 :Proceedings of the 22nd International Conference on VLSI Design |
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Static Analysis of Processor Stall Cycle Aggregation
Jongeun Lee and Aviral Shrivastava CODES+ISSS 2008 :Proceedings of the 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis |
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SDRM: Simultaneous Determination of Regions and
Function-to-Region Mapping for Scratchpad Memories
Amit Pabalkar, Aviral Shrivastava, Arun Kannan, and Jongeun Lee HIPC 2008 :International Conference on High Performance Computing |
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Mitigating the Impact of Hardware Failures on Multimedia Applications - A Cross-Layer Approach Kyoungwoo Lee, Aviral Shrivastava, Minyoung Kim, Nikil Dutt and Nalini Venkatasubramanian ACM MM 2008 :ACM International Conference on Multimedia |
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Partitioning Techniques for Partially Protected Caches to Reduce Soft Error Induced Failures Kyoungwoo Lee, Aviral Shrivastava, Nikil Dutt and Nalini Venkatasubramanian DIPES 2008 :IFIP Conference on Distributed and Parallel Embedded Systems |
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Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors Sanghyun Park, Aviral Shrivastava, and Yunheung Paek DATE 2008 :Proceedings of the International Conference on Design Automation and Test in Europe |
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SPKM : A Novel Graph Drawing based Algorithm for Application Mapping onto Coarse-Grained Reconfigurable Architecture Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn and Yunheung Paek ASPDAC 2008 :Proceedings of the Asia and South Pacific Design Automation Conference |
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A Compiler-in-the-Loop Framework for Exploration of Horizontally Partitioned Caches Aviral Shrivastava, Ilya Issenin, and Nikil Dutt ASPDAC 2008 :Proceedings of the Asia and South Pacific Design Automation Conference |
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PTSMT: A Tool for Cross-Level Power,
Performance and Thermal Exploration Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Fadi Kurdahi, and Nikil Dutt VLSI 2008 :Proceedings of the 21st International Conference on VLSI Design |
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Temperature and Process Variations aware
Power Gating of Functional Units Deepa Kannan, Vipin Mohan, Sarvesh Bharadwaj, Aviral Shrivastava and Sarma Vrudhula VLSI 2008 :Proceedings of the 21st International Conference on VLSI Design |
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Power Reduction of Functional Units
considering Temperature and Process Variations Deepa Kannan, Sarvesh Bharadwaj, Aviral Shrivastava and Sarma Vrudhula VLSI 2008 :Proceedings of the 21st International Conference on VLSI Design |
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Smart Driver for Power Reduction in Next Generation Bi-Stable Electrophoretic Display Technology Michael Baker, Aviral Shrivastava and Karam Chatha CODES+ISSS 2007 :Proceedings of the 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis |
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Power Conscious Mapping onto
Coarse-Grained Reconfigurable Architectures using Graph Drawing
based Algorithm Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, and Yunheung Paek WASP 2007 :Workshop on Application Specific Processors |
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Functional and Timing Validation of
Partially Bypassed Processors Qiang Zhu, Aviral Shrivastava, and Nikil Dutt DATE 2007 :Proceedings of the International Conference on Design Automation and Test in Europe |
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Robust Localization in
Wireless Sensor Networks through the Revocation of Malicious
Anchors Satyajayant Mishra, Guoliang Xue, and Aviral Shrivastava ICC 2007 :Proceedings of the International Conference on Communications |
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Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt and Nalini Venkatasubramanian CASES 2006 :Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems |
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Bypass Aware Instruction Scheduling for Register File Power Reduction Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alex Nicolau, Eugene Earlie, and Yunheung Paek LCTES 2006 :Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers and tool support for embedded systems |
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Automatic Generation of Operation Tables for Fast Exploration of
Bypasses in Embedded Processors Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alex Nicolau, Eugene Earlie, and Yunheung Paek DATE 2006 :Proceedings of the International Conference on Design Automation and Test in Europe |
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Compilation Techniques for Energy Reduction in Horizontally Partitioned
Cache Architectures
Aviral Shrivastava, Ilya Issenin and Nikil Dutt CASES 2005 :Proceedings of the 2005 International Conference on Compilers, Architectures and Synthesis for Embedded Systems on Hardware/Software Codesign and System Synthesis |
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Aggregating Processor Free Time for Energy Reduction
Aviral Shrivastava, Eugene Earlie, Nikil Dutt, and Alex Nicolau CODES+ISSS 2005 :Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis |
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PBExplore: A Framework for Compiler-in-the-Loop Exploration of
Partial Bypassing in Embedded Processors Aviral Shrivastava, Eugene Earlie, Nikil Dutt, and Alex Nicolau DATE 2005 :Proceedings of the International Conference on Design Automation and Test in Europe |
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Compiler-in-the-Loop, ADL-driven Early Architectural Exploration
Aviral Shrivastava, Nikil Dutt, Alex Nicolau, and Eugene Earlie TECHCON 2005 :Semiconductor Research Corporation |
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Operation Tables for Scheduling in the Presence of Partial Bypassing
Aviral Shrivastava, Eugene Earlie, Nikil Dutt, and Alex Nicolau CODES+ISSS 2004 :Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis |
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Energy Efficient Code Generation using rISA
Aviral Shrivastava and Nikil Dutt ASPDAC 2004 :Proceedings of the Asia and South Pacific Design Automation Conference |
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A Design Space Exploration Framework for Reduced Bit-width Instruction
Set Architecture (rISA) Design
Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil Dutt, and Alex Nicolau ISSS 2002 :Proceedings of the International Symposium on System Synthesis |
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An Efficient Compiler Technique for Code Size Reduction using Reduced
Bit-width ISAs
Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil Dutt, and Alex Nicolau DATE 2002 :Proceedings of the International Conference on Design Automation and Test in Europe |
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A Customizable Compiler Framework for Embedded Systems
Ashok Halambi, Aviral Shrivastava, Nikil Dutt, and Alex Nicolau SCOPES 2001 :International Workshop on Software and Compilers for Embedded Systems |
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Optimal Hardware/Software Partitioning for Concurrent Specification
Using Dynamic Programming
Aviral Shrivastava, Mohit Kumar, Sanjeev Kapoor, Shashi Kumar, and M. Balakrishnan VLSI 2000 :Proceedings of the 13th International Conference on VLSI Design |