Compiler-Microarchitecture Lab: Publications

Compiler-Microarchitecture Lab: Publications

Department of Computer Science
School of Computing, Informatics and Decision Systems Engineering
Arizona State University


Home Members Research Publications Sponsors Resources Photographs


Conference Papers Journal Articles Books Software Release Invited Talks Thesis

Journal Articles

pdf
bibtex High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures NEW
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, and Yunheung Paek
IEEE TCAD: IEEE Transactions on Computer Aided Design
Accepted for publication.
pdf
bibtex PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems NEW
Jongeun Lee and Aviral Shrivastava
ACM TECS: ACM Transactions on Embedded Computing Systems
Accepted for publication.
pdf
bibtex Memory Access Optimization in compilation for Coarse Grain Reconfigurable Architectures NEW
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, and Yunheung Paek
ACM TODAES: ACM Transactions on Design Automation of Electronic Systems
Accepted for publication.
pdf
bibtex Return Data Interleaving for Multi-channel Embedded CMP Systems NEW
Fei Hong and Aviral Shrivastava
IEEE TVLSI: IEEE Transactions on Very Large Scale Integrated circuits
Accepted for publication.
pdf
bibtex Static Analysis of Register File Vulnerability NEW
Jongeun Lee and Aviral Shrivastava
IEEE TVLSI: IEEE Transactions on Very Large Scale Integrated circuits
vol. 30, issue 4, pages 606-616, April 2010.
pdf
bibtex A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files
Jongeun Lee and Aviral Shrivastava
IEEE TCAD: IEEE Transactions on Computer Aided Design
vol. 29, issue 7, pages 1018-1027, July 2010.
pdf
bibtex Partitioning Techniques for Partially Protected Caches for Resource-Constrained Embedded Systems
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Nalini Venkatasubramanian
ACM TODAES: ACM Transactions on Design Automation of Embedded Systems
vol. 15, issue 4, pages 30:1-30:30, Oct 2010.
pdf
bibtex Code Transformations for TLB Power Reduction
Reiley Jeyapaul and Aviral Shrivastava
IJPP : International Journal on Parallel Programming
vol. 38, issue 3, pages 254-276, March 2010.
pdf
bibtex Reducing Functional Unit Power Consumption and its Variation using Leakage Sensors
Aviral Shrivastava, Deepa Kannan, Sarvesh Bhardwaj, and Sarma Vrudhula
IEEE TVLSI : IEEE Transactions on Very Large Scale Integration Systems,
vol. 18, number 6, pages 988-997, June 2010.
pdf
bibtex A Software-only solution to use Scratch Pads for Stack Data
Aviral Shrivastava, Arun Kannan, and Jongeun Lee
IEEE TCAD : IEEE Transactions on Computer Aided Design
vol. 28, number 11, pages 1719-1728, Nov 2009.
pdf
bibtex Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures
Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Sanghyun Park, and Yunheung Paek
IEEE TCAD : IEEE Transactions on Computer Aided Design
vol. 28, number 3, pages 461-466, March 2009.
pdf
bibtex A Graph Drawing Based Spatial Mapping Algorithm for Coarse- Grained Reconfigurable Architectures
Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, and Yunheung Paek
IEEE TVLSI : IEEE Transactions on VLSI
vol. 17, number 11, pages 1565-1579, Nov 2009.
pdf
bibtex Partially Protected Caches to Reduce Failures due to Soft Errors in Multimedia Applications
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Nalini Venkatasubramanian
IEEE TVLSI : IEEE Transactions on VLSI
vol. 17, number 9, pages 1343-1348, Sept 2009.
pdf
bibtex Data Partitioning Techniques for Partially Protected Caches to Reduce Soft Error Induced Failures
Kyoungwoo Lee, Aviral Shrivastava, Nikil Dutt, Nalini Venkatasubramanian
IFIP DES: IFIP Distributed Embedded Systems
vol. 271, pages 213-225, 2008.
pdf
bibtex Register File Power Reduction Using Bypass Sensitive Compiler
Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alex Nicolau, Yunheung Paek, Eugene Earlie
IEEE TCAD : IEEE Transactions on Computer Aided Design
vol. 27, number 6, pages 1155-1159, June 2008.
pdf
bibtex Automatic Design Space Exploration of Register Bypasses in Embedded Processors
Sanghyun Park, Aviral Shrivastava, Eugene Earlie, Nikil Dutt, Alex Nicolau, and Yunheung Paek
IEEE TCAD : IEEE Transactions on Computer Aided Design
vol. 26, number 12, pages 2102-2115, Nov. 2007.
pdf
bibtex ADL-driven Software Toolkit Generation for Architectural Exploration of Programmable SOCs
Prabhat Mishra, Aviral Shrivastava and Nikil Dutt
ACM TODAES : ACM Transactions on Design Automation of Electronic Systems
vol. 11, number 3, pages 626-658, March 2006.
pdf
bibtex Retargetable Pipeline Hazard Detection for Partially Bypassed Processors
Aviral Shrivastava, Nikil Dutt, Alex Nicolau, and Eugene Earlie
IEEE TVLSI : IEEE Transactions on VLSI
vol. 14, issue 8, pages 791-801, Sept 2006.
pdf
bibtex Compilation Framework for Code Size Reduction using Reduced Bit-width ISAs
Aviral Shrivastava, Ashok Halambi, Partha Biswas, Nikil Dutt, and Alex Nicolau
ACM TODAES : ACM Transactions on Design Automation of Electronic Systems
vol. 11, number 1, pages 123-146, Jan 2006.