Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt, and Nalini Venkatasubramanian
CASES 2006: Proceedings of the 2006 international conference on Compilers, architectures and synthesis for embedded systems on Hardware/Software Codesign and System Synthesis.
Abstract: With advances in process technology, soft errors (SE) are becoming an increasingly critical design concern. Due to their large area and high density, caches are worst hit by soft errors. Although Error Correction Code based mecha- nisms protect the data in caches, they have high performance and power overheads. Since multimedia applications are in- creasingly being used in mission-critical embedded systems where both reliability and energy are a major concern, there is a definite need to improve reliability in embedded systems, without too much energy overhead. We observe that while a soft error in multimedia data may only result in a minor loss in QoS, a soft error in a variable that controls the ex- ecution flow of the program may be fatal. Consequently, we propose to partition the data space into failure critical and failure non-critical data, and provide a high-degree of soft error protection only to the failure critical data in Horizon- tally Partitioned Caches. Experimental results demonstrate that our selective data protection can achieve the failure rate close to that of a soft error protected cache system, while re- taining the performance and energy consumption similar to those of a traditional cache system, with some degradation in QoS. For example, for conventional configuration as in Intel XScale, our approach achieves the same failure rate, while improving performance by 28% and reducing energy consumption by 29% in comparison with a soft error pro- tected cache.
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Center For Embedded Computer Systems, Department of Information and Computer Science, University of California, Irvine. |