Spring 2008: CSE 591

Compilers for Embedded Systems

Course Outcome: 1 paper accepted in international conferences

Code Transformations for TLB Power Reduction NEW
Reiley Jeyapaul and Aviral Shrivastava
VLSI 2009 :Proceedings of the 22nd International Conference on VLSI Design

Course Information

Instructor: Aviral Shrivastava
Meeting Location: BYENG 423
Meeting Time: Fridays, 1:00 pm - 3:30 pm
Office Hours: Fridays 3:30 pm - 4:30 pm

Course Abstract

Very often general purpose systems are unable to meet the power, performance etc. constraints of the specific application scenario. For example, it will be weird to use a Pentium processor to control the fuel injection system of a automobile. The environment dictates several application specific constraints, e.g. operating temperature, size, computation power, weight, and sometimes even the thickness of the device. Custom-defined solutions for such applications are called embedded systems. Embedded systems are usually designed by just modifying some general purpose processor; by removing some of the architectural features, adding some new ones, and so on. However, the complexity falls in the lap of the compiler. Compiler has to generate good code to take care of the customized architecture. It has to avoid the penalty due to missing design features, and it has to exploit the newly added design features. Often there are no existing compiler techniques to achieve the same. That's the research in compilers for embedded systems. Trying to compile for customized architectures to achieve a variety of design goals, e.g., code size minimization, power reduction, hotspot alleviation, performance improvement, reliability improvement etc. The discussions in this course will be classified by the architectural features, e.g., horizontally partitioned caches, dual instruction set architectures, scratch pad memories, and compiler objectives, e.g. power, performance, code size, temperature etc. In this research oriented course, you will have to come up with a compiler technique to exploit novel/existing architectural technique to improve any of the compiler objectives mentioned above. The ultimate metric of success in this class will be publishable quality work.

Course Structure

Classroom: This course is organized as a discussion course with each class meeting allocated to the discussion of a particular topic. Before each meeting, all students are expected to read three or four papers describing recent research on that topic. Each class will start with a lecture discussing the an embedded system compiler issue, followed by paper presentation by students.
There will be two programming assignments, the first one simple, just to get started, and the second one will be the main. The focus of the class will be on understanding design and compiler issues in embedded systems, and understanding the existing work done in the field. The objective is to come up with a new optimization technique and its evaluation.
There will be no homework assignments and no exams.

Grading

Paper presentation: 20%
Class participation: 20%

Project Proposal (1-2 page): 20%
Project Paper (6-10 page): 20%
Final Demonstration: 20%

Course Schedule

Week	Date	Discussion Topic
1	Jan 14	Lecture 1: Compilers for Embedded Systems
2	Jan 25	No class, Aviral out
3	Feb 01	Soft Errors Lecture 2: Soft Errors: Impact and Causes Presentation by Reiley Jeyapaul: Cost-Effective Register File Soft Error reduction Reading Soft Errors: An Embedded Tutorial Soft Errors in Advanced Computer Systems
4	Feb 08	Soft Errors Lecture 3: Soft Errors: Models and Hardware Techniques Reading A Systematic Methodology to Compute the Architectural Vulnerability Factors Transient Fault Detection via Simultaneous Multithreading
5	Feb 15	Soft Errors Lecture 4: Soft Errors: Software Techniques Presentation by Divya Gupta: Razor: A Low-Power Pipeline Based in Circuit-Level Timing Speculcation Reading ED4I-Error Detection by Diverse Data and Duplicated Instructions
6	Feb 22	Scratch Pads Lecture 5: Scratch Pads: Motivation Reading Scratch Pad Memory: A Design Alternative for Cache On-chip memory in Embedded Systems
7	Feb 29	Scratch Pads Lecture 5: Scratch Pads: Application Mapping Techniques Presentation by Amit Pabalkar: Dynamic scratchpad memory management for code in portable systems with an MMU Reading
8	Mar 07	Project Proposals Rooju Chokshi: Improving Power And Performance of Embedded Applications Using Residue Number System Arithmetic Sai Myvalarapu: Predictive Garbage Collection for Flash Memories Sandeep Marathe: Application Mapping onto CGRAs
9	Mar 14	Spring Break
10	Mar 21	Project Proposals Seung Chul: Read Data Interleaving for Better Memory Performance Divya Gupta: Shadow Latch for Soft Error Detection Arun Kannan: Complete software solution to useing Scratch Pad Memories for stack data
11	Mar 28	Coarse Grain Reconfigurable Architectures Lecture 6: CGRAs Presentation by Sandeep Marathe Reading
12	Apr 04	Coarse Grain Reconfigurable Architectures Lecture 7: CGRAs Presentation by Sandeep Marathe Reading
13	Apr 11	Flash Memory Lecture 8: Flash Presentation by Sai Mylavarapu Reading
14	Apr 18	Final Presentations
15	Apr 25	Final Presentations

Projects

Student

Project Proposal

Project Report

Project Presentation