The list of the most recent publications:

• “Simulation of the Impact of Process Variation on the Optimized 10-nm FinFET”, H. Khan, D. Mamaluy, D. Vasileska,
  IEEE Trans El. Dev. 55, pp. 2134-2141 (2008).
  IEEE_processvariation.pdf new!
   

• “Semiconductor device modeling" (review), D. Vasileska, D. Mamaluy, H. R. Khan, K. Raleva, and S. M. Goodnick,
  Journal of Computational and Theoretical Nanoscience Vol. 5, pp.1–32 (2008).
  Review J. Comp. Theor. Nanoscience.pdf new!
   

• “Approaching Optimal Characteristics of 10 nm High Performance Devices: a Quantum Transport Simulation Study of Si FinFET”, H. Khan, D. Mamaluy and D. Vasileska, IEEE Trans El. Dev. Vol. 55, pp. 743-753 (2008).
  IEEE TED - Optimized FinFET.pdf new!
   

• "Fully 3D self-consistent quantum transport simulation of Double-gate and Tri-gate FinFETs", H. Khan, D. Mamaluy and D. Vasileska, J. Comp. El. (Published online: 20 February 2008).
  J. Comp. El. IWCE 12 - 3D Tri-gate vs double-gate FET.pdf new!
   

• "Can Silicon FinFETs Satisfy ITRS Projections for High Performance 10 nm Devices?", H. Khan, D. Mamaluy and D. Vasileska, J. Comp. El. (Published online: 26 January 2008).
  J. Comp. El. IWCE 12 - Optimized FinFET.pdf new!
   

• “Influence of Interface Roughness on Quantum Transport in Nano-Scaled FinFET”, H. Khan, D. Mamaluy and D. Vasileska, J. Vac. Sci. Technol. B 25, pp. 1437-1440 (2007).
  J. Vacuum Science B.pdf 
   

• “Quantum transport simulation of experimentally fabricated nano-FinFET”, H. R. Khan, D. Mamaluy and D. Vasileska,
  IEEE Trans. Electron Devices Vol. 54 (4), pp. 784-796 (2007).
  IEEE TED - Experimental FinFET.pdf
   

• “Assessment of the CBR quantum transport simulator on Experimentally fabricated nano-FinFET",
  H. Khan, D. Mamaluy and D. Vasileska, ECS Transactions, Vol. 6(4), pp. 197-203 (2007).
   

• “Self-consistent Treatment of Quantum Transport in 10 nm FinFET Using Contact Block Reduction (CBR) Method”,
  H. Khan, D. Mamaluy, D. Vasileska, J. Comp. Electronics, Volume 6, Numbers 1-3 (September 2007)
  J. Comp. El. IWCE11.pdf
   

• “3D quantum transport simulator for next generation devices”,
  D. Mamaluy, H. Khan and D. Vasileska, Journal of Physics: Conference Series, Vol. 38, pp. 196-199 (2006).
   

• “Contact block reduction method for ballistic transport and carrier densities of open nanostructures”,
  D. Mamaluy, M. Sabathil, T. Zibold, D. Vasileska, P. Vogl, Phys. Rev. B 71, 245321 (2005)
  PhysRevB_71_245321 (2005).pdf

• "Calculation of carrier transport through quantum dot molecules",
  T. Zibold, M. Sabathil, D. Mamaluy, and P. Vogl
  AIP Conf. Proc. 722, 799 (2005)
  AIPTransportQDM2005.pdf

• “Prediction of realistic quantum logic gate using the contact block reduction method”,
  M. Sabathil, D. Mamaluy, P. Vogl, Semicond. Sci. and Technol. 19, S137 (2004)
  sst4_4_048_CBR.pdf

• “Efficient Computational Method for Ballistic Currents and Application to Single Quantum Dots”,
  M. Sabathil, S. Birner, D. Mamaluy and P. Vogl. J. Comp. Electronics 2, pp. 269-275 (2004)
  J. Comp. El. QD.pdf

• “Contact block reduction method and its application to 10-nm MOSFET device”,
  D. Mamaluy, D. Vasileska, M. Sabathil, P. Vogl, Semicond. Sci. and Technol. 19, S118 (2004)
  sst4_4_042_CBR.pdf

• "Electron density calculation using the contact block reduction method”,
  D. Mamaluy, A. Mannargudi, D. Vasileska, J. Comp. Electronics 3, 45 (2004)
  J. Comp. El. - density.pdf

• “Efficient method for the calculation of ballistic quantum transport”,
  D. Mamaluy, M. Sabathil, P. Vogl, J. App. Phys. 93, 4628 (2003)
  J. Appl. Phys. - CBR.pdf