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Course Work: Spring 09’
Visual DSP development - Programmed
in Assembly, C on TMS320C5510, Freescale DSP56858,
ADBF533 DSP o
DSP56858 - Developed real-time audio
applications with on-board CODEC - Echo and FIR filtering; Enhanced images with Gray level
Transformations, Segmentation, Quantization, Histogram Equalization o
TMS320C5510 - Implemented DIT topology for Radix-2
FFT, IFFT algorithms o ADBF533 - Implemented A-law speech coding,; Restored original image from noisy ones using DCT
Computer Architecture Project o
Technical Review on Virtual Machine
Monitors (VMMs) o
Comparison of hardware support provided for
VMMs by Intel VT-x, VT-I and AMD-V architecture
Fall 08’
Wireless
Communication Project [MATLAB] o
Analyzed Receive
Diversity techniques –
Space-time coding
Project: [MATLAB] o
Simulated capacity and
information rate using Monte-Carlo type simulations for the following schemes §
Single Antenna System,
Receive diversity using Maximal Ratio and Selection Combining §
Ergodic MIMO Rayleigh fading channel §
Non-Ergodic
MIMO quasi-static Rayleigh fading channel o
Compared performance of Space-Time Block and Space-Time Trellis Codes through
simulations §
Orthogonal
Space-Time Block code with QPSK over Rayleigh & Ricean
fading channels §
Quasi-orthogonal
space-time block code – as per Jafarkhani, H. IEEE
Trans. on Comm, 2001 §
Simulated
4 state and 8 state space-time trellis code with QPSK for 2X 1 and 2 X 2
system – used Viterbi Decoding o
Simulated
ZF, Linear MMSE receivers for V-BLAST with and without interference
cancellation, sorting
Topic:- Frequency Offset Estimation and Synchronization for Orthogonal Frequency Division Multiplexing (OFDM)
Spring 08’
Detection/Estimation theory
Project [MATLAB] o
Estimated
five unknown parameters in a active sonar system (underwater transmission) o Designed a detector for binary hypothesis problem
Cadence Project - Designed 32 entry, 32 bit wide static register file custom
layout cell with two read/one write port o
Optimized for minimum Energy consumption and
Delay using Logical Effort principle. o
Designed appropriate control circuitry for
Read/Write ports, Decoders, Latch circuitry Fall 07’
Digital Signal Processing Project o
Data compression using Fast Fourier
Transform (FFT) for audio signals using Peak Picking method
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