Aviral Shrivastava: Teaching: CSE/EEE 230

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CSE 230/EEE 230

Computer Organization and Assembly Language Programming

Catalog Description

Register-level computer organization, Instruction set architecture, Assembly language programming, Processor organization and design, Memory organization, Exception/interrupt handling.


Computer Organization and Design, The Hardware/Software Interface, Revised 4th Edition
Authors - David A. Patterson and John L. Hennessey
Publisher - Morgan Kaufman, now Elsevier
ISBN: 978-0-12-374750-1

Course Objectives and Outcomes

  1. Students should understand MIPS assembly language, and write assembly language programs for simple problems, including function calls.
  2. Students should understand the data representation (2's complement, single and double precision float point) inside the processor, and perform arithmetic operations on them.
  3. Students should understand the working of a single-cycle, multi-cycle, and pipelined processor. Students should be able to understand and appreciate more complex architectures.
  4. Students should understand the importance and impact of pipelining, as a concept and as applicable to processor architecture.
  5. Students should understand the concept and the rationale behind the memory organization, especially caches.
  6. Students should understand the metrics of performance and throughput, and quantitatively compare two computers.
  7. Students should understand how interrupts and exceptions are handled by the processor.


Major Topics Covered in the Course and Approximate Schedule

  1. MIPS instruction set architecture and assembly language (3 week)
  2. Data representation and arithmetic (1 week)
  3. Performance (1 week)
  4. Single cycle implementation (3 weeks)
  5. Multi-cycle implementation (2 week)
  6. Pipelined implementation (2 week)
  7. Memory organization (1 week)
  8. Interrupt and Exception Handling (1 week)

Class/Laboratory Schedule

Lectures: 2 hour 30 minutes per week.

Last Updated: Aviral Shrivastava, 10/2008