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ASU 101 CSE 230 CSE 310 CSE 325 CSE 420 CSE 591 PEC CSE 591 ARC Multi-core Programming

CSE 591: Low-Power and Parallel Computing

Course Objective: To develop a technique to improve processor efficiency and submit the paper to an international conference

Course Abstract

For the past 4 decades performance has been the main driver behind the evolution of processor architectures. However, relentless technology scaling has brought us to a point, where the power consumption has become the main design concern of system designers. The processor market is now increasingly being classified in terms of power consumption rather than performance. For example, you can hear processor companies talk about their desire to have a processor in the sub-watt range. This course will quickly gloss over the basic process-level, transistor-level, and circuit level techniques for power redcution. We will spend some time on methods of power characterization and estimation at the microarchitecture level. Our concentration will be on solutions to the power problem at the microarchitecture, compiler and system level. The projects will involve proposing and implementing novel power optimization technique. The ultimate metric of success in this class will be publishable quality work.


Must have done computer architecture course equivalent to CSE 420.
Courses in operating systems, digital system design, and parallel programming are preferable.

Course Contents

Course Structure