02.09.2018 11:10
Current Projects
This week I have been working on the Gen-II array tester using the AFE0064 charge sense chip modules we created a year ago. The system is back up and running and we need to figure out why we get the output that we do with the FDC-39B array that was attached to it over a year ago. We get a partial readout but a lot of black columns as well. It appears that the black bars may be due to the AFE0064 modules themselves. Some of them may be defective and we already see that some of them have a blue wire repair to correct some problem with circuit fabrication.
A checker board pattern was created with the FPGA to simulate a known data pattern coming out of the AFE0064. This checker board pattern was successfully displayed on the PC output of the system. Horizontal bars and vertical gradients will be tested next to ensure that the LabView data streaming and data parsing algorithms are correct. After these tests we can move on to testing the individual AFE0064 modules and testing system parameters and lighting conditions to see if they improve image output.