Chaitali Chakrabarti
Professor
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2022

Energy and LossAware Selective Updating for SplitFed Learning with Energy HarvestingPowered Devices
X. Chen, J. Li and C. Chakrabarti
Journal of Signal Processing Systems, 94(10, pp. 961975, 2022.

Versa: A 36 core Systolic Multiprocessor with Dynamically Reconfigurable Interconnect and Memory
S. Kim, M. Fayazi, A. Daftardar, K.Y. Chen, J. Tan, S. Pal, Y. Xiong, T. Mudge, C. Chakrabarti, D. Blaauw, R. Dreslinski and H.S. Kim
IEEE Journal of Solid State Circuits, 75(4), pp. 986998, April 2022.

Blockage Prediction using Wireless Signatures: Deep Learning Enables RealWorld Demonstrations
S. Wu, M. Alrabeiah, C. Chakrabarti and A. Alkhateeb
IEEE Open Journal of the Communications Society, 3, pp. 776796, 2022.

Probabilistic RiskAware Scheduling with Deadline Constraints for Heterogeneous SoCs
X. Chen, U. Ogras and C. Chakrabarti
ACM Transactions on Embedded Computing Systems, 21(2), 15;115:27, 2022.

Impact of Onchip Interconnect in Inmemory Acceleration of Deep Neural Networks
G. Krishnan, S. K. Mandal, C. Chakrabarti, J. Seo, U. Ogras and Y. Cao
ACM Journal on Emerging Technologies in Computing Systems, 18(2), 34:134:22, 2022.

TBFA: Targeted BitFlip Adversarial Weight Attack
A. Rakin, Z. He, J. Li, F. Yao, C. Chakrabarti and D. Fan
IEEE Transactions on Pattern Analysis and Machine Intelligence, 44(11), pp. 79287939, 2022.

ProfileGuided Parallel Task Extraction and Execution for DomainSpecific Heterogeneous SoC
L. Chang, J. Mack. B. Willis, X. Chen, J. Brunhaver, A. Akoglu and C. Chakrabarti
Proc. of International Symposium on Parallel and Distributed Processing (ISPA), Dec 2022.

AI Computing in Light of 2.5D Interconnect Roadmap: BigLittle Chiplets for InMemory Acceleration
Z. Wang, G. R. Nair, G. Krishnan, S. Mandal, N. Cherian, J. Seo, C. Chakrabarti, U. Ogras and Y. Cao
Proc. of International Electronic Devices Meeting (IEDM), Dec 2022.

BigLittle Chiplets for InMemory Acceleration of DNNs: A Scalable Heterogeneous Architectuire
G. Krishnan, A. Goksoy, S. Mandal, Z. Wang, C. Chakrabarti, J. Seo, U. Ogras and Y. Cao
Proc. of IEEE International Conference on Computer Aided Design (ICCAD), Nov 2022.

An Adjustable Farthest Point Sampling Method for Approximately Sorted Point Cloud Data
J. Li, J. Zhou, Y. Xiong, X. Chen and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems (SiPS), Oct 2022.

ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning
J. Li, A. S. Rakin, X. Chen, Z. He, D. Fan and. C. Chakrabarti
proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2022.

Deep Learning for Blockage Prediction using Real Millimeter Wave Measurements
S. Wu, M. Alrabeiah, A. Hredzak, C. Chakrabarti and A. Alkhateeb
Proc. of IEEE International Conference on Communications (ICC), May 2022.

Improving Energy Efficiency of Convolutional Neural Networks on Multicore Architectures through Runtime Reconfiguration
Y. Xiong, J. Li, D. Blaauw, H.S. Kim, T. Mudge, R. Dreslinski and C. Chakrabarti
Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2022.

Enabling SoftwareDefined RF Convergence with a Novel CoarseScale Heterogeneous Processor
D. W. Bliss and et. al
Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2022.
2021

SIAM: Chipletbased Scalable Inmemory Acceleration with Mesh for Deep Neural Networks.
G. Krishnan, S. Mandal, M. Pannala, C. Chakrabarti, J. Seo, Y. Cao and U. Ogras
ACM Transactions on Embedded Computing Systems, 2021.

Frontend Architecture Design for Low Complexity 3D Ultrasound Imaging based on Synthetic Aperture Sequential Beamforming
J. Zhou, S. Mandal, B. West, S. Wei, U. Ogras, O.Kripfgans, J.B.Fowles, T.F. Wenisch and C. Chakrabarti
IEEE Transactions on VLSI Systems, 29(2), pp. 336346, 2021.

CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics
S. Feng, J. Sun, S. Pal, K. Kaszyk, X. he, D.H. Park, M. Morton, D. Blaauw, H.S. Kim, T. Mudhe, M. Cole, M. O'Boyle, C. Chakrabarti amd R. Dreslinski
Proc. of Design Automation Conference (DAC), Dec 2021.

NeurObfuscator: A Fullstack Obfuscation Tool to Mitigate Neural Architecture Stealing
J. Li, A. Rakin, Z. He, D. Fan and C. Chakrabarti
International Symposium on Hardware Oriented Security and Trust (HOST), Dec 2021.

Systemlevel Benchmarking of Chipletbased IMC Architectures for Deep Neural Network Acceleration
G. Krishnan, S. Mandal, C. Chakrabarti, J. Seo, U. Ogras and Y. Cao
IEEE 14th International Conference on ASIC, China, Oct 2021.

Communication and Computation Reduction in Split Learning using Asynchronous Training
X. Chen, J. Li and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems (SiPS), Oct 2021.

Computationallyefficient Voice Activity Detection based on Deep Neural Networks
Y. Xiong, V. Berisha and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems (SiPS), Oct 2021.

Versa: A Dataflowcentric Multiprocessor with 36 Systolic ARM CortexM4F Cores and a Reconfigurable CrossbarMemory Hierarchy in 28 nm
S. Kim, M. Fayazi, A. Daftardar, K.Y. Chen, J. Tan, S. Pal, T. Ajayi, Y. Xiong, T. Mudge, C. Chakrabarti, D. Blaauw, R. Dreslinski and H.S. Kim
Proc. of VLSI Symposium, May 2021.

RADAR: Runtime Adversarial Weight Attack Detection and Accuracy Recovery
J. Li, A. Rakin, Z. He. D. Fan and C. Chakrabarti
Proc. of Design and Test in Europe (DATE), Feb 2021.
2020

TETRIS: Using Software/Hardware CoDesign to Enable Handheld physiceLimited 2D PlaneWave Ultrasound Imaging
B. West, J. Zhou, R. Dreslinski, O. Kripfgans, J.B.Fowles, C. Chakrabarti and T.F. Wenisch
Special Issue on DpomainSpecific Architectures for Emerging Applications, IEEE Transactions on Computers,
69(8), pp. 12091220, 2020.

Parallel Gibbs Sampler for Waveletbased Bayesian Compressive Sensing
J. Zhou, A. PapamdreouSuppappola and C. Chakrabarti
Journal of Signal Processing Systems, 92(10), pp.11011114, 2020.

Interconnectaware Area and Energy Optimization for Inmemory Acceleration of DNN
S. Mandal, G. Krishnan, C. Chakrabarti, J.S. Seo, U. Ogras and Y. Cao
IEEE Design and Test, 2020.

A LatencyOptimized Reconfigurable NoC for InMemory Acceleration of DNN
S. Mandal, G. Krishnan, C. Chakrabarti, J.S. Seo, Y. Cao and U. Ogras
IEEE Journal of Emerging Selected Topics in Circuits and Systems, 10(3), pp. 362375, 2020.

A 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarsegrain
Sparsity with All Parameters Stored onChip
D. Kadetotad, S. Yin, V. Berisha, C. Chakrabarti and J.S. Seo
IEEE Journal of Solid State Circuits, 55(7), pp. 18771887, 2020.

A 7.3M Output Nonzeros/J, 11.7M Output Nonzeros/GB Reconfigurable Sparse Matrixmatrix Multiplication
D.H. Park, S. Pal, S. Feng, P. Gao, J. Tan, A. Rovinski, S. Xie, C. Zhao, A. Amarnath, T. Wesley, J. Beaumont,
K.Y. Chen, C. Chakrabarti, M. Taylor, T. Mudge, D. Blaauw, H.S. Kim and R. Dreslinski
IEEE Journal of Solid State Circuits, 55(4), pp. 933944, 2020.

Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration
S. Pal, S. Feng, D.H. Park, S. Kim, A. Amarnath, C.S. Yang, X. He, J. Beaumont, K. May, Y. Xiong, K. Kaszyk, M. Morton, J. Sun, M.O'Boyle, M. Cole, C. Chakrabarti, D. Blaauw, H.S. Kim, T. Mudge and R. Dreslinski
Proc. of 29th Int. Conf. on Parallel Architectures and Compilation Techniques (PACT), Oct 2020.

Compressing LSTM Networks with Hierarchical Coarsegrained Sparsity
D. Kadetotad, J. Meng, V. Berisha, C. Chakrabarti and J.S. Seo
Proc. of INTERSPEECH, Oct 2020.

Communications an dHighprecision Positioning (CHP2): Enabling Secure CNS and APNT for Safetycritical Air Transport Systems
S. Srinivas, A. Herschfelt, H. Yu, S. Wu, Y. Li, H. Lee, C. Chakrabarti and D.W. Bliss
Proc. of IEEE/AIAA 38th Digital Avionics Systems Conference (DASC), 2020.

Defending and Harnessing the BitFlip based Adversarial Weight Attack
A.S. Rakin, Z. He, J. Li, C. Chakrabarti and D. Fan
Conference on Computer Vision and Pattern Recognition (CVPR), June 2020.

Defending BitFlip Attacks through DNN Weight Reconstruction
J. Li, A.S. Rakin, Y. Xiong, L. Chang, Z. He, D. Fan and C. Chakrabarti
Proc. of Design Automation Conference (DAC), June 2020.

Accelerating Deep Neural Neytwork Computations on a Low Power Reconfigurable Architecture
Y. Xiong, J. Zhou, S. Pal, D. Blaauw, H.S. Kim, T. Mudge, R. Dreslinski and C. Chakrabarti
Proc. of IEEE Symposium on Circuits and Systems (ISCAS), Oct 2020.

Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture
A. Soorishetty, J. Zhou, S. Pal, D. Blaauw, H.S. Kim, T. Mudge, R. Dreslinski and C. Chakrabarti
Proc. of IEEE Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2020.
2019

Articulation Constrained Learning Application to Speech Emotion Recognition
M. Shah, M. Tu, V. Berisha, C. Chakrabarti and A. Spanias
EURASIP Journal on Audio, Speech and Music Processing, accepted for publication, 2019.

Low Complexity HardwareEfficient NeighborGuided SGM Optical Flow for Low Power Mobile Vision Applications
Z. Li, J. Xiang, L. Gong, D. Blaauw, C. Chakrabarti and H.S. Kim
IEEE Transactions on Circuits and Systems for Video Technology, 29(7), pp. 21912204, July 2019.

MAX2: An ReRAMbased Neural Accelerator that Maximizes Data Reuse and Area Utilization
M. Mao, X. Peng, R. Liu, J. Li, S. Yu
and C. Chakrabarti
IEEE Journal of Emerging Technologies, Circuits and Systems, 9(2), pp. 398410, June 2019.

A Deep QLearning Approach to Dynamic Management of Heterogeneous Processors
U. Gupta, S. K. Mandal, M. Mao, C. Chakrabarti and U. Y. Ogras
IEEE Computer Architecture Letters, 18(1), pp. 1417, 2019.

ConfigurableECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High
Bandwidth Memory Systems
H.M. Chen, S.Y. Lee, T.N. Mudge, C.J. Wu and C. Chakrabarti
IEEE Transactions on Computers, 68(5), pp. 646659, May 2019.

Delay Compression: Reducing Delay Calculation Requirements for 3D PlaneWave Ultrasound
B. West, J. Zhou. C. Chakrabarti and T. F. Wenisch
Proc. of IEEE Ultrasound Symposium, Oct 2019.

Improving Reliability of ReRAMbased DNN Implementation through Novel Weight Distribution
J. Li, M. Mao and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2019.

Residual+Capsule Networks (ResCap) for Simultaneous SingleChannel Overlapped Keyword Recognition
Y. Xiong, V. Berisha and C. Chakrabarti
Proc. of INTERSPEECH, Sep 2019.

Joint Positioning and Communications System Design and Experimental Demonstration
A. Herschfelt, H. Yu, S. Yu, S. Srinivas, Y, Li, N. Sciammelta, L. Smith, K. Reuger, H. Lee,
C. Chakrabarti and D. Bliss
Proc. of IEEE/AIAA 38th Digital Avionics Systems Conference, 2019.

A 7.3 M Output NonZeros/J Sparse matrixMatrix Multiplication Accelerator using Memory
Reconfiguration in 40nm
S. Pal, D.H. Park, S. Feng, P. Gao, J. Tan, A. Rovinski, S. Xie, X. Zhao, A. Amarnath, T. Wesley,
J. Beaumont, K.Y. Chen, C. Chakrabarti, M. Taylor, T. Mudge, D. Blaauw, H.S. Kim and R. Dreslinski
Proc. of IEEE VLSI Symposia on VLSI Technology and Circuits, June 2019.

Tetris: A Streaming Accelerator for PhysicsLimited 3D PlaneWave Ultrasound Imaging
B. West, J. Zhou, C. Chakrabarti and T. F. Wenisch
Proc. of Design Automation Conference, June 2019.

Joint Optimization of Quantization and Structured Sparsity for Compressed Deep Neural Networks
G. Srivastava, D. Kadetotad, S. Yin, V. berisha, C. Chakrabarti and J. Seo
Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing, May 2019.
2018

High Volumerate 3D Ultrasound Imaging based on Synthetic Aperture Sequential Beamforming with
Chirpcoded Excitation
J. Zhou, S. Wei, R. Jintamethasawat, R. Sampson, O. Kripfgans, J. B. Fowlkes, T. F. Wenisch
and C. Chakrabarti
IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, pp. 13461358, Aug 2018.

Error Analysis of Speed of Sound Reconstruction in Ultrasound Limited Angle Transmission Tomography
R. Jintamethasawat, W.M. Lee, P. L. Carson, F. M. Hooi, J. B. Fowlkes, M. M. Goodsitt, R. Sampson, T. F. Wenisch,
S. Wei, J. Zhou, C. Chakrabarti and O. Kripfgans
Ultrasonics, 88, pp. 174184, 2018.

Design and Analysis of Energyefficient and Reliable 3D ReRAM Crosspoint Array System
M. Mao, S. Yu and C. Chakrabarti
IEEE Transactions on VLSI Systems, pp. 12901300, July 2018.

Reducing Energy of Baseband Processor for IoT Terminals with Long Range Wireless Communication
S. Wu, C. Chakrabarti and H. Lee
Journal of Signal Processing Systems, pp, 13451355, Aug 2018.

A Versatile ReRAMbased Accelerator for Convolutional Neural Networks
M Mao, X. Sun, X. Peng, S. Yu and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2018.

A Parallel RRAM Synaptic Array Architecture for Energyefficient Recurrent Neural Networks
S. Yin, X. Sun, S. Yu, J.S. Seo and C. Chakarbarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2018.

Parallel Waveletbased Bayesian Compressive Sensing based on Gibbs Sampling
J. Zhou and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2018.

Synthetic Aperture Vector Flow Imaging with Specle Tracking
S. Wei, J. Zhou, O. D. Kripfgans, J. B. Fowlkes, T. F. Wenisch and C. Chakrabarti
Proc. of IEEE Ultrasound Symposium, Oct 2018.

OuterSPACE: An Outer Product based Sparse Matrix Multiplication Accelerator
S. Pal, J. Beaumont, D.H. Park, A. Amarnath, S. Feng, C. Chakrabarti, H.S. Kim, D. Blaauw, T. Mudge and
R. Drelinski
Proc. of High Performance Computer Architecture, pp. 724736, March 2018.
2017

LowCost 3D Flow Estimation of Blood with Clutter
S. Wei, M. Yang, J. Zhou, R. Sampson, O. Kripfgans, J.B. Fowlkes, T.F. Wenisch and C. Chakrabarti
IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, 64(5), March 2017.

A Multilayer Approach to Designing EnergyEfficient and Reliable ReRAM Crosspoint Array System
M. Mao, P.Y. Chen, S. Wu and C. Chakrabarti
IEEE Transactions on VLSI Systems, 25(5), 2017.

Cost Effective Design Solutions for Enhancing PRAM Reliability and Performance
C. Yang, M. Mao, Y. Cao and C. Chakrabarti
IEEE Transactions on MultiScale Computing Systems, 3(1), 2017.

A FixedPoint Neural Network Architecture for Speech Applications on Resource Constrained Hardware
M. Shah, S. Arunachalam, J. Wang, D. Blaauw, D. Sylvester, H.S. Kim, J. Seo and C. Chakrabarti
Journal of Signal Processing Systems, Spring 2017 (online version in Nov 2016).

Minimizing Area and Energy of Deep Learning Hardware Design using Collective Low Precision and Structured Compression
S. Yin, G. Srivastava, S. K. Venkataramanaiah, C. Chakrabarti, V. Berisha and J. Seo
Asilomar Conference on Signals, Systems and Computers, November 2017.

Fluid Wireless Protocols: EnergyEfficient Design and Implementation
G. Bhat, S. Srinivas, V. Chagari, J. Park, T. McGiffen, H. Lee, D. W. Bliss, C. Chakrabarti and U. Ogras
IEEE/ACM Symposium in Embedded Systems for Multimedia (ESTIMedia), October 2017.

Algorithm and Hardware Design of DiscreteTime Spiking Neural Networks based on Back Propagation with Binary Activations
S. Yin, S. K. Venkataramanaiah, G. K. Chen, R. Krishnamurthy, Y. Cao, C. Chakrabarti and J. Seo
IEEE Biomedical Circuits and Systems Conference (BioCAS), October 2017.

High Volume Rate 3D Ultrasound Imaging using Synthetic Aperture Sequential Beamforming
J. Zhou, S. Wei, R. Sampson, R. Jinthamethasawat, O. Kripfgans, J. B. Fowlkes, T. F. Wenisch and C. Chakrabarti
IEEE Ultrasonics Symposium (IUS), October 2017.

Low Power Neuromorphic Speech Recognition Engine with Coarsegrain Sparsity
S. Yin, D. Kadetotad, B. Yan, C. Song, Y. Chen. C. Chakrabarti and J. Seo
Asia and South Pacific Design Automation Conference (ASpDAC), January 2017.
2016

RATTECC: RateAdaptive TwoTiered Error Correction Codes for Reliable 3D DieStacked Memories
H.M. Chen, C.J. Wu, T. Mudge and C. Chakrabarti
ACM Transactions on Architectures and Code Optimization, 13(3), September 2016.

Using Low Cost Erasure and Error Correction Schemes to Improve Reliability
of Commodity DRAM Systems
H.M. Chen, S. Jeloka, A. Arunkumar, D. Blaauw, C.J. Wu, T. Mudge and C. Chakrabarti
IEEE Transactions on Computers, 65(12), April 2016.

Optimizing Latency, Energy and Reliability of 1T1R ReRAM through CrossLayer Techniques
M. Mao, Y. Cao, S. Yu and C. Chakrabarti
IEEE Journal on Emerging and Selected Topics in Circuits and Systems; Special issue on Emerging Memories, 6(3), 2016.

Low Power Baseband Processor for IoT Terminals with Long Range Wireless Communications
S. Wu, S. Kang, C. Chakrabarti and H. Lee
Global Conference on Signal and Information Processing (GlobalSIP), Dec 2016.

Efficient Memory Compression in Deep Neural Networks using CoarseGrain Sparsification for Speech Applications
D. Kadetotad, S. Arunachalam, C. Chakrabarti and J. Seo
IEEE Int. Conf. on Computer Aided Design, Nov 2016.

HardwareEfficient NeighborGuided SGM Optical Flow for Low Power Vision Applications
J. Xiang, Z. Li, H.S. Kim and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2016. Best Paper Award.

Low Complexity 3D Ultrasound Imaging using Synthetic Aperture Sequential Beamforming
J. Zhou, S. Wei, R. Sampson, R. Jintamethasawat, O. Kripfgans, J.B. Fowlkes, T. F. Wenisch and C. Chakrabarti
Proc. of IEEE Ultrasonicsc Symposium, Oct 2016.

Improving Plane Wave Imaging Performance through PostProcessing
S. Wei, J. Zhou, R. Sampson, R. Jintamethasawat, O. Kripfgans, J.B. Fowlkes, T. F. Wenisch and C. Chakrabarti
Plane Wave Imaging Challenge in Medical Ultrasound (PICMUS), Proc. of IEEE Ultrasonics Symposium, Oct 2016.

Checkpointing Exascale Memory Systems with Existing Memory Technologies
N. Abeyratne, H.M. Chen, B. Oh, R. Dreslinksi, C. Chakrabarti and T. Mudge
Proc. of Int. Symp. on Memory Systems (MEMSYS), Oct 2016.

Low Complexity Optical Flow using NeighborGuided SemiGlobal Matching
J. Xiang, Z. Li, D. Blaauw, H.S. Kim and C. Chakrabarti
Proc. of Int. Conf. on Image Processing, Sep 2016.

Design of a Reliable RRAMbased PUF for Compact Hardware Security Primitives
A. Shrivatsava, P.Y.Chen, Y. Cao, S. Yu and C. Chakrabarti
Proc. of Int. Symp. on Circuits and Systems, May 2016.
2015

Within and Cross Corpus Speech Emotion Recognition using Latent Topic
Modelbased Functions
M. Shah, C. Chakrabarti and A. Spanias
EURASIP Journal on Audio, Speech and Music Processing, 2015:4(2015).

Separable Beamforming for 3D Medical Ultrasound Imaging
M. Yang, R. Sampson, S. Wei, T. F. Wenisch and C. Chakrabarti
IEEE Transactions on Signal Processing, 63(2): 279290, Feb 2015.

An Overview of Recent Advances in Distributed and Agile Sensing Algorithms
and Implementations
M. K. Banaver, J. J. Zhang, B. Chakraborty, H. Kown, Y. Li, H. Jiang, A. Spanias,
C. Tepedenlenlioglu, C. Chakrabarti and A, PapandreouSuppappola
Digital Signal Processing, vol 39, pp. 114, 2015.

Using Graphics Processing Units in an LTE Basestation
Q. Zheng, Y. Chen, H. Lee, R. G. Dreslinski, C. Chakrabarti, A. Anastapoulos, S. A. Mahlke and T. N. Mudge
Journal of Signal Processing Systems, 78(1): 3547, 2015.

High Frame Rate 3D Ultrasound Imaging Using Separable Beamforming
M. Yang, R. Sampson, S. Wei, T. F. Wenisch and C. Chakrabarti
Journal of Signal Processing Systems, 78(1): 7384, 2015.

Optimizing Latency, Energy and Reliability of 1T1R ReRAM through
Appropriate Voltage Settings
M. Mao, Y. Cao, S. Yu and C. Chakrabarti
Proc. of Int. Conf. on Computer Design, pp. 388395, Oct 2015.

EECC: Low Power Erasure and Error Correction Schemes for Increasing
Reliability of Commodity DRAM Systems
H.M. Chen, A. Arunkumar, C.J. Wu. T. Mudge and C. Chakrabarti
Proc. of Int. Symp. on Memory Systems (MEMSYS), pp. 6070, Oct 2015.

Programming Strategies to Improve Energy Efficiency and Reliability of
ReRAM Memory Systems
M. Mao, Y. Cao, S. Yu and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2015.

Low Cost Clutter Filter for 3D Ultrasonic Flow Estimation
S. Wei, M. Yang, R. Sampson, O. Krifgans, J. B. Fowlkes, T. F. Wenisch
and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2015.

A Fixedpoint Neural Network for Keyword Detection in Resource
Constrained Hardware
M. Shah, J. Wang, D. Blaauw, D. Sylvester, H.S. Kim and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2015.

FPGA Implementation of Low Power 3D Ultrasound Beamformer
R. Sampson, M. Yang, S. Wei, R. Jintamethaswat, J. B. Fowlkes, O. Kripfgans,
C. Chakrabarti and T. F. Wenisch
Proc. of IEEE Ultrasonics Symposium, Oct 2015.

Exploiting Resistive Crosspoint Array for Compact Design of Physical
Unclonable FUnctions
P. Y. Chen, R. Fang, R. Lui, C. Chakrabarti and S. Yu
Proc. of HardwareOriented Security and Trust (HOST), pp. 3631, 2015.
2014

Sonic Millip3De: An Architecture for Handheld 3D Ultrasound
R. Sampson, M. Yang, S. Wei, C. Chakrabarti and T. F. Wenisch
IEEE Micro Top Picks, 34(3): 100108, March 2014.

A Distributed Canny Edge Detector: Algorithm and FPGA Implementation
Q. Xu, S. Varadarajan, C. Chakrabarti and L. J. Karam
IEEE Trans on Image Processing, 23(7): 29442960, July 2014.

A Low Cost
MultiTiered Approach to Improving the Reliability of MultiLevel Cell PRAM
C. Yang, Y. Emre, Z. Xu, H.M. Chen, Y. Cao and C. Chakrabarti
Journal of Signal Processing Systems, 76(2): 225234, 2014.

Improving the Reliability of MLC NAND Flash Memories through Adaptive Data
Refresh and Error Control Coding
C. Yang, H.M. Chen, T. N. Mudge and C. Chakrabarti
Journal of Signal Processing Systems, 76(3): 225234, 2014.

Compact Modeling of STTMTJ Devices
Z. Xu, C. Yang, M. Mao, K. Sutaria, C. Chakrabarti and Y. Cao
Solid State Electronics, vol 102, pp.7681, Dec 2014.

A Low Complexity Scheme for Accurate 3D Velocity Estimation in Ultrasound Systems
S. Wei, M. Yang, C. Chakrabarti, R. Sampson, T. F. Wenisch, O. Kripfgans and J. B. Fowlkes
Proc. of IEEE Workshop on Signal Processing Systems, pp. 8590, 2014.

Low Cost ECC Schemes for Improving the Reliability of DRAM+PRAM Main
Memory Systems
M. Mao, X. Yang, Z. Xu, Y. Cao and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, pp. 139144, 2014.
 High Volume Rate, High Resolution 3D Plane Wave Imaging
M. Yang, R. Sampson, S. Wei, T. F. Wenisch, J. B. Fowlkes, O. Kripfgans and C. Chakrabarti
Proc. of IEEE Ultrasonics Symposium, Sep 2014.

A Hybrid Approach to Offloading Mobile Image Classification
J. Hauswald, T. Manville, Q. Zheng, R. G. Dreslinski, C. Chakrabarti and
T. N. Mudge
Proc. of Int. Conf. on Acoustics, Speech and Signal Processing,
pp. 83758379, 2014.

A Multimodal Approach to Emotion Recognition using Undirected Topic Models
M. Shah, C. Chakrabarti and A. S. Spanias
Proc. of Int. Symp. on Circuits and Systems, pp. 754757, 2014.

Image Processing Using Approximate Datapath Units
M. Vasudevan and C. Chakrabarti
Proc. of Int. Symp. on Circuits and Systems, pp. 15441547, 2014.
2013

Energy and QualityAware Multimedia Signal Processing
Y. Emre and C. Chakrabarti
IEEE Trans on Multimedia, Nov 2013.

Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and RealTime FPGA Implementation
L. Miao, J. J. Zhang, C. Chakrabarti and A. PapandreouSuppappola.
IEEE Trans on Signal Processing, March 2013.

Multisource Neural Activity Estimation and Sensor Scheduling: Algorithms and Hardware Implementation
L. Miao, S. Michael, N. Kovvali, C. Chakrabarti and A. PapandreouSuppappola.
Journal of Signal Processing Systems, (invited paper).

Hardware Acceleration for Neuromorphic Vision Algorithms
A. Al Maashri, M. Cotter, N. Chadramoorthy, M. DeBole, C.L. Yu, V. Narayanan and C. Chakrabarti
Journal of Signal Processing Systems, (invited paper).

Techniques for Compensating Memory Errors in JPEG2000
Y. Emre and C. Chakrabarti.
IEEE Trans on VLSI Systems, Jan 2013.

Exploring DRAM Optimizations for EnergyEfficient and Resilient Exascale
Memories
B. Giridhar, M. Cieslak, D. Duggal, H.M. Chen, R. Dreslinksi, R. Patti, B. Hold,
C. Chakrabarti, T. Mudge and D. Blaauw
Proc. of Supercomputing Conference, Nov 2013.

Separable Beamforming for 3D Synthetic Aperture Ultrasound Imaging
M. Yang, R. Sampson, T. F. Wenisch and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2013.

A Parallel Stochastic Computing System with Improved Accuracy
L. Miao and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2013.

Architecting an LTE Basestation with Graphics Processing Units
Q. Zheng, Y. Chen, R. Dreslinksi, C. Chakrabarti, A. Anastasopoulos,
S. Mahlke and T. Mudge
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2013.

Compact Modeling of STTMTJ for SPICE Simulation
Z. Xu, K. B. Sutaria, C. Yang, C. Chakrabarti and Y. Cao
Proc. of the European Solid State Device Research and Circuits Conference.

WiBench: An Open Source Kernel Suite for Benchmarking Wireless Systems
Q. Zheng, Y. Chen, R. Dreslinksi, C. Chakrabarti, A. Anastasopoulos, S. Mahlke and T. Mudge
Proc. of Int. Symp. on Workload Characterization, Sep 2013.

Sonic Millip3De with Dynamic Receive Focusing and Apodization Optimization
R. Sampson, M. Yang, S. Wei, C. Chakrabarti and T. F. Wenisch
Proc. of IEEE Ultrasound Symposium, July 2013.

Data Storage Time Sensitive ECC Schemes for MLC NAND Flash Memories
C. Yang, D. Muckatira, A. Kulkarni and C. Chakrabarti
Proc. of Int. Conf. on Acoustics, Speech and Signal Processing, May 2013.

A Speech Emotion Recognition Framework based on Latent Dirichlet
Allocation: Algorithm and FPGA Implementation
M. Shah, L. Miao, C. Chakrabarti and A. Spanias
Proc. of Int. Conf. on Acoustics, Speech and Signal Processing, May 2013.

Parallelization Techniques for Implementing Trellis Algorithms on Graphics
Processors
Q. Zheng, Y. Chen, R. Dreslinski, C. Chakrabarti, A. Anastasopoulos, S. Mahlke
and T. Mudge
Proc. of Int. Symp. on Circuits and Systems, May 2013.

Sonic Millip3De: A Massively Parallel 3DStacked Accelerator for
3D Ultrasound
R. Sampson, M. Yang, S. Wei, C. Chakrabarti and T. F. Wenisch
Proc. of High Performance Computer Architecture, Feb 2013, Best Paper Award.
2012

Product Code Schemes for Error Correction in MLC NAND Flash Memories
C. Yang, Y. Emre and C. Chakrabarti.
IEEE Trans. on VLSI Systems, Dec 2012.

Improving Reliability of NonVolatile Memory Technologies through
CircuitLevel Techniques and Error Control Coding
C. Yang, Y. Emre, Y. Cao and C. Chakrabarti
Eurasip Journal on Advances in Signal Processing, Sep 2012.

A SuperPipelined Energy Efficient Subthreshold 240MS/s FFT Core in
65nm CMOS
D. Jeon, M. Seok, C. Chakrabarti, D. Blaauw and D. Sylvester.
Journal of Solid State Circuits, Jan 2012.

Parallel High Throughput SoftOutput Sphere Decoding Algorithm
Q. Qi and C. Chakrabarti.
Journal of Signal Processing Systems, 68(2), 2012.

QualityAware Techniques for Reducing Power of JPEG Codecs
Y. Emre and C. Chakrabarti.
Journal of Signal Processing Systems, 69(3), 2012.
(invited paper).

Hierarchical Modeling of Phase Change Memory for Reliable Design
Z. Xu, K. Sutaria, C. Yang. C. Chakrabarti and Y. Cao.
Proc. of the Int. Conf. on Computer Design, 2012.

EEG/MEG Artifact Suppression for Improved Neural Activity Estimation
A. Maurer, L. Miao, J. J. Zhang, N. Kovvali, A. PapandreouSuppappola and
C. Chakrabarti.
Asilomar Conference on Signals, Systems and Computers, Nov 2012.

Enhancing the Reliability of STTRAM through Circuit and Systemlevel techniques
Y. Emre, C. Yang, K. Sutaria, Y. Cao and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2012.

A Multitiered Approach to Improving the Reliability of Multilevel Cell PRAM
C. Yang, Y. Emre, Y. Cao and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2012.

Reducing the Complexity of Orthogonal Codebased Synthetic Aperture
Ultrasound System
M. Yang, S. Wei and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2012.

Process Variation in NearThreshold Wide SIMD Architectures
S. Seo, R. G. Dreslinski, M. Woh, Y. Park, C. Chakrabarti, S. Mahlke, D. Blaauw
and T. Mudge.
Proc. of Design Automation Conference, June 2012.

Accelerating Neuromorphoc Vision Algorithms for Recognition
A. Al Maashri, M. Debole, M. Cotter, N. Chandramoorthy, Y. Xiao,
C. Chakrabarti and V. Narayanan.
Proc. of Design Automation Conference, June 2012.

Design of Orthogonal Coded Excitation for Synthetic Aperture Imaging in
Ultrasound Systems
M. Yang and C. Chakrabarti.
Proc. of Int. Symp. on Circuits and Systems, May 2012.

Transposefree SAR Imaging on FPGA Platform
C.L Yu and C. Chakrabarti.
Proc. of Int. Symp. on Circuits and Systems, May 2012.

Neural Activity Tracking using Spatial Compressive Particle Filtering
L. Miao, J. J. Zhang, A. PapandreouSuppappola and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, April 2012.

A TopDown Design Methodology using Virtual Platforms for Concept
Development
M Shah, B. Mears, C. Chakrabarti and A. Spanias.
Proc. of Int. Symp. on Quality Electronic Design, March 2012.

An Analytical Approach for Efficient Circuit Variability Analysis in
Scaled CMOS Design
S. Gummalla, A. R. Subramaniam, Y. Cao and C. Chakrabarti.
Proc. of Int. Symp. on Quality Electronic Design, March 2012.
2011

Algorithm and Parallel Implementation of Particle Filtering and its Use in
WaveformAgile Sensing
L. Miao, J. J. Zhang, C. Chakrabarti and A. PapandreouSuppappola.
Journal of Signal Processing Systems, Dec 2011 (invited paper).

Multidimensional DFT IP Generator for FPGA Platforms
C.L. Yu, K. Irick, C. Chakrabarti and V. Narayanan.
IEEE Trans on Circuits and Systems I, April 2011.

FPGA Architecture for 2D Discrete Fourier Transform based on 2D Decomposition for Large Sized Data
C.L. Yu, J. S. Kim, L. Deng, S. Kestur, V. Narayanan and C. Chakrabarti.
Journal of Signal Processing Systems, Spring 2011.

A Framework for Accelerating Neuromorphic Vision Algorithms on FPGA
M. debole, A. Al Maashri, M. Cotter, C.L. Yu, C. Chakrabarti and V. Narayanan.
Proc. of the International Conference on ComputerAided Design, Nov 2011.

A Hardware Architecture for Accelerating Neuromorphic Vision Algorithms
A. Al Maashri, M. Debole, C.L. Yu, C. Chakrabarti and V. Narayanan.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2011.

Flexible Product Codebased ECC Schemes for MLC NAND Flash Memories
C. Yang. Y. Emre, C. Chakrabarti and T. Mudge.
Proc. of the IEEE Workshop in Signal Processing Systems, Oct 2011.

RealTime ClosedLoop Tracking of an Unknown Number of Neural Sources
using probability Hypothesis Density Particle Filtering
L. Miao, J. J. Zhang, C. Chakrabarti, A. PapandreouSuppappola and N. Kovvali.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2011.
(Student Best Paper Award Finalist).

Low Energy Motion Estimation via Selective Approximation
Y. Emre and C. Chakrabarti.
Proc. of the IEEE Int. Conf. on Applicationspecific Systems, Architectures
and Processors, Sep 2011.

A 0.27V, 30MHz, 17.7nJ/transform 1024pt Complex FFT Core with Superpipelining
M. Seok, D. Jeon, C. Chakrabarti, D. Blaauw and D. Sylvester.
Proc. of the International Solid State Circuits Conference, Feb 2011.

Energyoptimized High Performance FFT Processor
M. Seok, D. Jeon, C. Chakrabarti, D. Blaauw and D. Sylvester.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, June 2011.

Datapath and Memory Error Compensation Techniques for Low Power JPEG
Implementations
Y. Emre and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, June 2011.

Pipeline Strategy for Improving Optimal Energy Efficiency in
Ultra Low Voltage Design
M. Seok, D. Jeon, C. Chakrabarti, D. Blaauw and D. Sylvester.
Proc. of the Design Automation Conference, June 2011.

An AlgorithmArchitecture Codesign Framework for Gridding
Reconstruction using FPGAs
S. Kestur, K. Irick, S. Park, A. Al Mashri, V. Narayanan and C. Chakrabarti.
Proc. of the Design Automation Conference, June 2011.
2010

Random Variability Modeling and its Impact on Scaled CMOS Circuits
Y. Ye, S. Gummalla, C.C. Wang, C. Chakrabarti and Y. Cao.
Journal of Computational Electronics, Dec 2010.

Accurate Area, Time and Power Models for FPGAbased Implementations
L. Deng, K. Sobti, Y. Zhang and C. Chakrabarti.
Journal of Signal Processing Systems, Spring 2010.

A Low Power DSP for Wireless Communications
H. Lee, C. Chakrabarti and T. Mudge.
IEEE Trans on VLSI Systems, Sep 2010.

AnySP: Anytime Anywhere Anyway Signal Processing
M. Woh, S. Seo, S. Mahlke, T. Mudge, C. Chakrabarti and K. Flautner.
IEEE MICRO Top Picks, Jan/Feb 2010.

Mobile Supercomputer for the Next Generation Cell Phone
M. Woh, S. Mahlke, T. Mudge and C. Chakrabarti.
IEEE Computer, Jan 2010.

Multiple Sensor Sequential Tracking of Neural Activity: Algorithm and FPGA Implementation
L. Miao, J. J. Zhang, C. Chakrabarti and A. PapandreouSuppappola.
Proc. of the Asilomar Conference on Signals, Systems and Computers, Nov 2010.

An Ultra Low Power SIMD Processor for Wireless Devices
M. Woh, S. Seo, C. Chakrabarti, S. Mahlke and T. Mudge.
Proc. of the Asilomar Conference on Signals, Systems and Computers, Nov 2010.

A New Parallel Implementation for Particle Filters and its Applications to Adaptive Waveform Design
L. Miao, J. J. Zhang, C. Chakrabarti and A. PapandreouSuppappola.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2001. Best Paper Award.

Memory Error Compensation Techniques for JPEG2000
Y. Emre and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2010.

Parallel Deblocking Filter for H.264 AVC/SVC
V. Sundaram and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2010.

Parallel High Throughput SoftOutput Sphere Decoder
Q. Qi and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2010.

DietSODA: A PowerEfficient Processor for Digital Cameras
S. Seo, R. Dreslinski, M. Woh, C. Chakrabarti, S. Mahlke and T. Mudge.
Proc. of the Int. Symp. on Low Power Electronics and Design, Aug 2010.

Energyaware OFDM Systems
Y. Emre and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, March 2010.

Bandwidthintensive FPGA Architectures for Multidimensional DFT
C.L. Yu, C. Chakarabarti, S. Park and V. Narayanan.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, March 2010.

A Distributed PsychoVisually Motivated Canny Edge Detector
S. Varadarajan, C. Chakrabarti, L. J. Karam and J. M. Bauza.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, March 2010.

A Specialpurpose Compiler for Lookup Table and Code Generation for Function Evaluation
Y. Zhang, L. Deng, P. Yedlapalli, S. Muralidharan, H. Zhao. M. Kandemir, C. Chakrabarti, N. Pitsianis and X. Sun.
Proc. of Design and Test in Europe, March 2010.
2009

An Automated Framework for Accelerating Numerical Algorithms on
Reconfigurable Platforms using Algorithmic/Architectural Optimization
J. S. Kim, L. Deng, P. Mangalagiri, K. Irick, K. Sobti, M. Kandemir,
V. Narayanan, C. Chakrabarti, N. Pitsianis and X. Sun.
IEEE Trans on Computers, Dec 2009.

ArchitectureAware LDPC Code Design for MultiProcessor
Software Defined Radio Systems
Y. Zhu and C. Chakrabarti.
IEEE Trans on Signal Processing, Sep 2009.

Design Methodology for Low Power Dissipation and Parametric Robustness
through Output Quality Modulation: Application to Color Interpolation
Filtering
N. Banerjee, G. Karkaonstantis, J. H. Choi, C. Chakrabarti and K. Roy.
IEEE Trans on Computer Aided Design, August 2009.

Energy Efficient Video Transmission over a Wireless Link
Y. Li, M. Reisslein and C. Chakrabarti.
IEEE Trans on Vehicular Technology, March 2009.

Maximizing the Lifetime of Embedded Systems Powered by Fuel CellBattery
Hybrids
J. Zhuo, C. Chakrabarti, K. Lee, N. Chang and S. Vrudhula.
IEEE Trans on VLSI Systems, Jan 2009.

An H.264/SVC Memory Architecture Supporting Spatial and CoarseGrained Quality Scalabilities
N. Narvekar, B. Konnanath, S. Mehta, S. Chintalapati, J. AlKamal, C. Chakrabarti and L. Karam.
Proc. of the Int. Conf. on Image Processing, Nov 2009.

FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for LargeSized Data
J. S. Kim, C. _L. Yu, L. Deng, S. Kestur, V. Narayanan and C. Chakrabarti.
Proc. of the IEEE Workshop on Signal Processing Systems, Oct 2009.

Automated Optimization of LookUp Table Implemenaations for Function Evaluation on FPGAs
L. Deng, C. Chakrabarti, N. Pitsianis and X. Sun.
Proc. of SPIE vol. 8444, Aug 2009.

Low Power Robust Signal Processing
V. Papirla, A. Jain and C. Chakrabarti.
Proc. of the Int. Symp. on Low Power Electronics and Design, July 2009.

Energyaware Error Control Coding for Flash Memories
V. Papirla and C. Chakrabarti.
Proc. of the IEEE/ACM Design Automation Conference, July 2009.

AnySP: Anytime Anywhere Anyway Signal Processing
M. Woh, S. Seo, S. Mahlke, T. Mudge, C. Chakrabarti and K. Flautner.
Proc. of the International Symposium on Computer Architecture, June 2009.
2008

Energyefficient Dynamic Task Scheduling for DVS Systems
J. Zhuo and C. Chakrabarti.
ACM Transactions on Embedded Computing Systems,
Feb 2008.

A Fuel CellBattery Hybrid for Portable Embedded Systems
K. Lee, N. Chang, J. Zhuo, C. Chakrabarti, S. Kadri and S. Vrudhula.
ACM Transactions on Design Automation of Embedded Systems,
Jan 2008.

From SODA to Scotch: The Evolution of a Wireless Baseband Processor
M. Woh, Y. Lin, S. Seo, S. Mahlke, T. Mudge, C. Chakrabarti, R. Bruce, D. Kershaw, A. Reid, M. Wilder and K. Flautner.
Proc. of the IEEE/ACM International Symposium on Microarchitecture,
Nov 2008. Best Paper Award.

Efficient Mapping of Advanced Signal Processing Algorithms on MultiprocessorArchitectures
B. Manjunath, A. Williams, C. Chakrabarti and A. PapandreouSuppappola.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2008.

Efficient Image Reconstruction using Partial 2D Fourier Transform
L. Deng, C.L. Yu, C. Chakrabarti, J. Kim and V. Narayanan.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2008.

Extending the Lifetime of Media Recorders Constrained by Battery and
Flash Memory Size
Y. Kim, Y. Cho, N. Chang, C. Chakrabarti and N. I. Cho.
Proc. of the Int. Symp. on Low Power Electronics and
Design, Aug 2008.

A Parameterized Dataflow Language Extension for Embedded Streaming
Systems
Y. Lin, Y. Choi, S. Mahlke, T. Mudge and C. Chakrabarti.
Proc. of the Int. Symp. on Systems, Architectures, Modeling and
Simulation, July 2008.

Accurate Models for Estimating Area and Power of FPGA Implementations
L. Deng, K. Sobti and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing, April 2008.
2007

SODA: A HighPerformance DSP Architecture for Software Defined Radio
Y. Lin, H. Lee, M. Woh, S. Mahlke, T. Mudge, Y. Harel, C. Chakrabarti and
K. Flautner.
MICRO Top Picks, Jan/Feb 2007.

Automatic AntennaTuning Unit for SoftwareDefined and
Cognitive Radio
S.H. Oh, H. Song, J. Aberle, B. Bakkaloglu and C. Chakrabarti.
Wireless Communications and Mobile Computing Journal, 2007.

A Comprehensive Energy Model and EnergyQuality Evaluation for Wireless
Transceiver FrontEnds
Y. Li, B. Bakkaloglu and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp. 90103, Jan 2007.

Design Methodology to TradeOff Power, Output Quality and Error
Resiliency: Application to Color Interpolation Filtering
G. Karakonstantis, N. Banerjee, K. Roy and C. Chakrabarti.
Proc. of the Int. Conf. on Computer Aided Design, Nov 2007.

Sphere Decoding for Multiprocessor Architectures
Q. Qi and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2007.

Design and Analysis of LDPC Decoders for Software Defined Radio
S. Seo, T. Mudge, Y. Zhu and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2007.

Efficient Function Evaluations with Lookup tables for Structured
Matrix Operations
K. Sobti, L. Deng, C. Chakrabarti, N. Pitsianis, X. Sun, J. Kim,
P. Mangalgiri, V. Narayanan and M. Kandemir.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2007.

Energy Management of DVSDPM Enabled Embedded Systems Powered by
Fuel CellBattery Hybrid Source
J. Zhuo, C. Chakrabarti and N. Chang.
Proc. of the Int. Symp. on Low Power Electronics and Design, Aug 2007.

Throughput of MultiCore Processors under Thermal Constraints
R. Rao, S. Vrudhula and C. Chakrabarti.
Proc. of the Int. Int. Symp. on Low Power Electronics and Design, Aug 2007.

TANOR: A Tool for Accelerating NBody Simulations on Reconfigurable
Platform
J. Kim, P. Mangalagiri, K. Irick, M. Kandemir, V. Narayanan, K. Sobti,
L. Deng, C. Chakrabarti, N. Pitsianis and X. Sun.
Proc. of the 17th Int. Conf. on Field Programmable Logic and Applications,
Aug 2007.

The Next Generation Challenge for Software Defined Radio
M. Woh, S. Seo. H. Lee, Y. Lin, S. Mahlke, T. Mudge, C. Chakrabarti
and K. Flautner.
Proc. of the Int. Symp. on Systems, Architectures, Modeling and
Simulation, July 2007. Best Paper Award.

Dynamic Power Management with Hybrid Power Sources
J. Zhuo, C. Chakrabarti, K. Lee and N. Chang.
Proc. of the Design Automation Conference, June 2007.

Memory Efficient LDPC Code Design for High Throughput Software Defined RadioSystems
Y. Zhu and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing,
April 2007.
2006

A Coprocessor Architecture for Fast Protein Structure Prediction
M. Marolia, R. Khoja, T. Acharya and C. Chakrabarti.
Pattern Recognition, pp. 24942505, Dec 2006.

A Survey of LiftingBased Discrete Wavelet Transform Architectures
T. Acharya and C. Chakrabarti.
Journal of VLSI Signal Processing, pp. 321329, March 2006.

Study of Energy and Performance of SpaceTime Decoding Systems in
Concatenation with Turbo Decoding
Y. Zhu, L. Li and C. Chakrabarti.
IEEE Trans on VLSI Systems, pg. 8690, Jan 2006.

ArchitectureAware LDPC Code Design for Software Defined Radio
Y. Zhu and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2006.

Design and Implementation of Turbo Decoders for Software Defined Radio
Y. Lin, S. Mahlke, T. Mudge, C. Chakrabarti, K. Flautner and A. Reid
Proc. of the IEEE Workshop on Design and Implementation of
Signal Processing Systems, Oct 2006.

Reducing Idle Mode Power in Software Defined Radio Terminals
H. Lee, T. Mudge and C. Chakrabarti.
Proc. of the Int. Symp. on Low Power Electronics and Design, Oct 2006.

An Optimal Analytical Solution for Processor Speed Control with
Thermal Constraints
R. Rao, S. Vrudhula, C. Chakrabarti and N. Chang.
Proc. of the Int. Symp. on Low Power Electronics and Design, Oct 2006.

Maximizing the Lifetime of Embedded Systems Powered by Fuel CellBattery
Hybrids
J. Zhuo, C. Chakrabarti, N. Chang and S. Vrudhula.
Proc. of the Int. Symp. on Low Power Electronics and Design, Oct 2006.

Highlevel Power Management of Embedded Systems with ApplicationSpecific
Energy Cost Function
Y. Cho, N. Chang, C. Chakrabarti and S. Vrudhula.
Proc. of the Design Automation Conference, July 2006.

Extending the LIfetime of Fuel Cell Based Hybrid Systems
J. Zhuo, C. Chakrabarti, N. Chang and S. Vrudhula.
Proc. of the Design Automation Conference, July 2006.

SODA: A Low Power Architecture for Software Radio
Y. Lin, H. Lee, M. Woh, Y. Harel, S. Mahlke, T. Mudge,
C. Chakrabarti and K. Flautner.
Proc. of the Int. Symp. on Computer Architecture, June 2006.

Aggregated Circulant Matrix Based LDPC Codes
Y. Zhu and C. Chakrabarti.
Proc. of the Int. Conf. on Acoustics, Speech and Signal Processing,
May 2006.
2005

An Efficient Control Point Insertion Technique for
Leakage Reduction of Scaled CMOS Circuits
H. Rahman and C. Chakrabarti.
IEEE Trans on Circuits and Systems II, August 2005.

Memory Subbanking Schemes for High Throughput MAP based SISO Decoders
M. Tiwari, Y. Zhu and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp, 494498, April 2005.

Static Task Scheduling Algorithm for Battery Powered DVS Systems
P. Chowdhury and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp. 226233, Feb 2005.

Multiport Memory Design for Low Power Embedded Systems
W.T. Shiue and C. Chakrabarti.
Design Automation for Embedded Systems, vol. 9, pp. 235261, 2005.

A Comprehensive Energy Model and EnergyQuality Tradeoffs for
Wireless Transceiver FrontEnds
Y. Li, B. Bakkaloglu and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of Signal
Processing Systems, Nov 2005.

Battery Aware Wireless AdHoc Routing Protocol
Q. Qi and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of Signal
Processing Systems, Nov 2005.

A CoProcessor Architecture for fast Protein Structure
Prediction
M. Marolia, R. Khoja, T. Acharya and C. Chakrabarti.
Proc. of the IEEE Workshop on Design and Implementation of Signal
Processing Systems, Nov 2005.

SystemLevel EnergyEfficient Dynamic Task Scheduling Algorithms
J. Zhuo and C. Chakrabarti.
Proc. of the Design Automation Conference (DAC), June 2005.

An Efficient Dynamic Task Scheduling Algorithm for Battery Powered
DVS Systems
J. Zhuo and C. Chakrabarti.
Proc. of the Asia South Pacific Design Automation
Conference (ASPDAC), Jan 2005.
2004

Design and Implementation of Low Energy Turbo Decoders
J. Kaza and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp. 968977, Sep 2004.

Mobile Supercomputers
T. Austin, D. Blaauw, S. Mahlke, T. Mudge,
C. Chakrabarti and W. Wolf.
IEEE Computer, pp. 8183, May 2004.

An Approach for Adaptively Approximating the Viterbi Algorithm
to Reduce Power Consumption while Decoding Convolutional Codes
R. Henning and C. Chakrabarti.
IEEE Transactions on Signal Processing, pp. 14431451, May 2004.

Optimum Buffer Size for Dynamic Voltage Processors
A. Manzak and C. Chakrabarti
Proc. of the 14th Int Workshop on Power and Timing
Modeling, Optimization and Simulation (PATMOS)}, Sep 2004.

Packet Transmission Policies for Battery Operated
Communication Systems
Y. Li and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, Oct 2004

Memory Subbanking Scheme for High Throughput Turbo Decoders
M. Tiwari, Y. Zhu and C. Chakrabarti
Proc. of Int. Conf on Acoustics, Speech and Signal Processing, May 2004.

Parametrized SoC Design for Portable Systems
S. Bhutoria and C. Chakrabarti
Proc. of Int. Symp. on Circuits and Systems, May 2004.

A Dynamic Task Scheduling Algorithm for Battery Powered DVS Systems
A. Jameel and C. Chakrabarti
Proc. of Int. Symp. on Circuits and Systems, May 2004.

A Leakage Estimation and Reduction Technique for Scaled CMOS
Logic Circuits Considering Gate Leakage
H. Rahman and C. Chakrabarti
Proc. of Int. Symp. on Circuits and Systems, May 2004.
2003

A High Performance JPEG 2000 Architecture
K. Andra, C. Chakrabarti and T. Acharya.
IEEE Trans on Circuits and Systems for Video Technology,
pp. 209218, March 2003.

Variable Voltage Task Scheduling Algorithms for Minimizing Energy/Power
A. Manzak and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp. 270276, April 2003.

`Energy Efficient Turbobased SpaceTime Coder
Y. Zhu, L. Li and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, 2003

BatteryFriendly Design of Signal Processing Algorithms
P. Raghavan and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, 2003
2002

An Approach to Switching Activity Consideration during High Level Low
Power Design Space Exploration
R. Henning and C. Chakrabarti.
IEEE Trans on Circuits and Systems II, pp. 339351, May 2002.

A VLSI Architecture for LiftingBased Forward and Inverse Wavelet
Transform
K. Andra, C. Chakrabarti and T. Acharya.
IEEE Trans on Signal Processing, pp. 966977, April 2002.

A Low Power Scheduling Scheme with Resources Operating at Multiple
Voltages
A. Manzak and C. Chakrabarti.
IEEE Trans on VLSI Systems, pp 614, Feb 2002.

Batteryaware Task Scheduling for a SystemonaChip Using Voltage/Clock
Scaling
P. Chowdhury and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, 2002

Low Power Approach for Decoding Convolutional Codes with Adaptive
Viterbi Algorithm Approximation
R. Henning and C. Chakrabarti
Proc. of International Symposium on Low Power Electronic Design, 2002.

BatteryConscious Task Sequencing for Portable Devices including
Voltage/Clock Scaling
D. Rakhmatov, S. Vrudhula and C. Chakrabarti
Proc. of Design Automation Conference, 2002.

EnergyEfficient Design of Turbo Decoders
J. Kaza and C. Chakrabarti
Proc. of International Conference on Acoustics, Speech and
Signal Processing, 2002.

Architectural Approaches to Reducing Leakage Energy in Caches
S. Tadas and C. Chakrabarti
Proc. of International Symposium on Circuits and Systems, 2002.

A High Performance JPEG 2000 Architecture
K. Andra, T. Acharya and C. Chakrabarti
Proc. of International Symposium on Circuits and Systems, 2002.
2001

Memory Design and Exploration for Low Power Embedded Systems
W.T. Shiue and C. Chakrabarti.
Journal of VLSI Signal Processing, pp.167178, Nov 2001.

Data Memory Design and Exploration for Low Power Embedded Systems
W.T. Shiue and C. Chakrabarti.
ACM Transactions on Design and Automation of Electronic Systems,
pp. 553569, Oct 2001.

Voltage Scaling for Energy Minimization with QoS Constraints
A. Manzak and C. Chakrabarti
Proc. of International Conference on Computer Design, 2001.

Variable Voltage Task Scheduling for Minimizing Energy
A. Manzak and C. Chakrabarti
Proc. of International Symposium on Low Power Electronic Design, 2001.

Efficient VLSI Implementation of Bit Plane Coder of JPEG2000
K. Andra, T. Acharya and C. Chakrabarti
Proc. of SPIE Applications of Digital Image Processing, 2001

EnergyEfficient Address Code Generation for Digital Signal
Processors
S. Udayanarayanan and C. Chakrabarti
Proc. of Design Automation Conference, 2001

An Approach for Enabling DCT/IDCT Energy Reduction Scalability
in MPEG2 Video Codecs
R. Henning and C. Chakrabarti
Proc. of International Conference on Acoustics, Speech and
Signal Processing, 2001.

An Efficient Implementation of a Set of Lifting Based Wavelet
Filters
K. Andra, C. Chakrabarti and T. Acharya
Proc. of International Conference on Acoustics, Speech and
Signal Processing, 2001.
2000

VLSI Architectures for Weighted Order Statistic Filters
C. Chakrabarti and L. Lucke.
Signal Processing, vol.80, pp.14191433, 2000.

Low Power Scheduling with Resources Operating at Multiple Voltages
W.T. Shiue and C. Chakrabarti.
IEEE Transactions on Circuits and
Systems II, June 2000.

A Multibit BInary Arithmetic Coding Technique
K. Andra, T. Acharya and C. Chakrabarti
Proc. of International Conference on Image Processing, 2000.

A VLSI Architecture for Lifting Based Wavelet Transform
K. Andra, C. Chakrabarti and T. Acharya
Proc. of IEEE Workshop on Signal Processing Systems, 2000.

A QualityEnergy Tradeoff Approach for IDCT Computation in MPEG2
Video Decoding
R. Henning and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, 2000.

Low Power Multimodule Multiport Memory Design for Embedded
Systems
W.T. Shiue, S. Tadas and C. Chakrabarti
Proc. of IEEE Workshop on Signal Processing Systems, 2000.
 Variable Voltage Task Scheduling for Minimizing Energy or Minimizing Power
A. Manzak and C. Chakrabarti
Proc. of International Conference on Acoustics, Speech and
Signal Processing, 2000.

Energyefficient Code Generation for the DSP56000 family
S. Udayanarayanan and C. Chakrabarti
Proc. of International Symposium on Low Power Electronic Design, 2000.

Relating Data Characteristics to Transition Activity in Highlevel
Static CMOS Design
R. Henning and C. Chakrabarti
Proc. of VLSI Design 2000

ILPbased Scheme for Low Power Scheduling with Resource Binding
W.T. Shiue and C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 2000.

A Programmable Processor for Cryptography
S. Raghuram and C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 2000.
1999

Efficient realizations of encoders and decoders based on the
2D Discrete Wavelet Transform
C. Chakrabarti and C. Mumford.
IEEE Transactions on VLSI Systems, pp. 289298, Sep 1999.

A new register allocation scheme for data format converters
K. Srivatsan, C. Chakrabarti and L. Lucke.
IEEE Transactions on Circuits and
Systems II, pp. 12501253, Sep 1999.

Memory Exploration for Low Power Embedded Systems
W.T. Shiue and C. Chakrabarti
Proc. of the Design Automation Conference, 1999

Instructionlevel power model of microcontrollers
C. Chakrabarti and D. Gaitonde
Proc. of the International Symposium on Circuits and Systems, 1999

A low power scheduling scheme with resources operating at multiple
voltages
A. Manzak and C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 1999

Memory Design and Exploration for Low Power Embedded Systems
W.T. Shiue and C. Chakrabarti
Proc. of the Design and Implementation of Signal Processing
Systems, 1999

A DWT based encoder architecture for symmetrically extended images
C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 1999

Activity Models for use in Low Power, High Level Synthesis
R. Henning and C. Chakrabarti
Proc. of the International Conference on Acoustics, Speech
and Signal Processing, 1999
1998

Hardware Design of a 2D Motion Estimation System based on the Hough
Transform
H. Li and C. Chakrabarti.
IEEE Transactions on Circuits and Systems II,
vol. 45, no. 1, pp. 8095, Jan 98.

Low Power Scheduling with Resources Operating at Multiple Voltages
W.T. Shiue and C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 1998

VLSI Architectures for Weighted Order Statistic Filters
C. Chakrabarti and L. E. Lucke
Proc. of the International Symposium on Circuits and Systems, 1998
1997

HighLevel design Synthesis of a Low Power VLIW Processor for the
IS54 VSELP Speech Encoder
R. Henning and C. Chakrabarti
Proc. of the International Conference on Computer Design, 1997
1996

A survey of VLSI architectures for Wavelet Transforms
C. Chakrabarti, M. Vishwanath and R. M. Owens.
Journal of VLSI Signal Processing}, vol. 14, no. 2,
pp. 171192, Nov 1996.

Motion Estimation of 2Dimensional Objects Based on the Straight Line
Hough Transform: A New Approach
H. Li and C. Chakrabarti.
Pattern Recognition,
vol. 29, no. 8, pp. 12451258, Aug 1996.

A New Architecture for the Viterbi Decoder for Code Rate
k/n
H. Li and C. Chakrabarti.
IEEE Trans on
Communications, pp. 158164, Feb 1996.

Scheduling for Minimizing the Number of Memory Accesses in
Low Power Applications
R. Saied and C. Chakrabarti
Proc. of the VLSI Signal Processing Workshop, 1996

Hardware Implementation of a 2D Motion Estimation System
Based on the Hough Transform
H. Li and C. Chakrabarti
Proc. of the International Symposium on Circuits and Systems, 1996

Efficient Realizations of Analysis and Synthesis Filters
based on the 2D Discrete Wavelet Transform
C. Chakrabarti and C. Mumford
Proc. of the International Conference on
Acoustics, Speech, and Signal Processing, 1996
1995

Architectures for Hierarchical and Other
Block Matching Algorithms
G. Gupta and C. Chakrabarti.
IEEE Transactions on Circuits and Systems for Video
Technology, pp. 477489, Dec 1995.

Efficient Realizations of the Discrete and Continuous
Wavelet Transforms: from single chip implementations to mappings on
SIMD array computers
C. Chakrabarti and M. Vishwanath.
IEEE Trans on Signal Processing, pp.759771, March
1995.

A DigitSerial Architecture for GrayScale Morphological
Filtering
L. E. Lucke and C. Chakrabarti
IEEE Trans on Image Processing, pp. 387391, March 95.

Low Power Data Format Converter Design using SemStatic Register
Allocation
K. Srivatsan, C. Chakrabarti and L. Lucke.
Proc. of the International Conference on Computer Design, 1995

A Parallel Programmable Architecture for Linear and Nonlinear
Filters
L. Lucke and C. Chakrabarti.
1995 IEEE Workshop on
on Nonlinear Signal and Image Processing, pp. 891894, 1995.

A New Viterbi Decoder Design for Code Rate
k/n
H. Li and C. Chakrabarti.
Proc. of the IEEE International Conference on Acoustics,
Speech, and Signal Processing, 1995.

Architectures for the Discrete and Continuous
Wavelet Transforms
C. Chakrabarti, M. Vishwanath and R. M. Owens.
Proc. of the IEEE International Conference on Acoustics,
Speech, and Signal Processing, 1995.

Efficient Architectures for Hidden Surface Removal
C. Chakrabarti and L. Lucke.
Proc. of the First IEEE
International Conference on Image Processing, 1995.
1994

Novel Sorting NetworkBased Architectures for RankOrder
Filters
C. Chakrabarti and L. Y. Wang.
IEEE
Transactions on VLSI Systems, pp. 502507, Dec 1994.

High Sample Rate Architectures for Median Filters.
C. Chakrabarti.
IEEE Trans on Signal Processing, vol. 42, no. 3, pp. 707712, March 1994.

A DigitSerial Architecture for GrayScale Morphological
Filtering
L. E. Lucke and C. Chakrabarti
IEEE International
Symposium on Circuits and Systems, vol. 4, pp. 207210, 1994.

Novel Sorting NetworkBased Architectures for RankOrder
Filters
C. Chakrabarti and L. Y. Wang.
IEEE International
Symposium on Circuits and Systems, vol. 3, pp. 8992, 1994.

High Sample Rate Architectures for Block Adaptive Filters.
S. Karkada, C. Chakrabarti and A. Spanias.
IEEE International
Symposium on Circuits and Systems, vol. 4, pp. 131134, 1994.

VLSI Architectures for Hierarchical Block Matching
G. Gupta and C. Chakrabarti.
IEEE International
Symposium on Circuits and Systems, vol. 4, pp. 215219, 1994

A VLSI Architecture for RealTime Hierarchical Encoding/Decoding
of Video using the Wavelet Transform
M. Vishwanath and C. Chakrabarti.
IEEE International Conference on Acoustics,
Speech, and Signal Processing, 1994.
1993

Sorting Network based Architectures for Median Filters
C. Chakrabarti.
IEEE Trans on Circuits and Systems}, vol. 40, no. 11, pp.723727, Nov 1993.
Chaitali Chakrabarti
Professor
chaitali@asu.edu